? semiconductor components industries, llc, 2009 october, 2009 ? rev. 6 1 publication order number: NCV8402/d NCV8402 self-protected low side driver with temperature and current limit NCV8402 is a three terminal protected low ? side smart discrete device. the protection features in clude overcurrent, overtemperature, esd and integrated drain ? to ? gate clamping for overvoltage protection. this device offers pr otection and is suitable for harsh automotive environments. features ? short ? circuit protection ? thermal shutdown with automatic restart ? overvoltage protection ? integrated clamp for inductive switching ? esd protection ? dv/dt robustness ? analog drive capability (logic level input) ? rohs compliant ? aec ? q101 qualified ? ncv prefix for automotive and other applications requiring site and change control ? these are pb ? free devices typical applications ? switch a variety of resistive, inductive and capacitive loads ? can replace electromechanical relays and discrete circuits ? automotive / industrial drain source temperature limit gate input current limit current sense overvoltage protection esd protection http://onsemi.com *max current limit value is dependent on input condition. sot ? 223 case 318e style 3 marking diagram v (br)dss (clamped) r ds(on) typ i d max 42 v 165 m @ 10 v 2.0 a* a = assembly location y = year w = work week 8402 = specific device code = pb ? free package 1 (note: microdot may be in either location) 1 ayw 8402 23 4 gate drain source drain 2 3 4 device package shipping ? ordering information ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. NCV8402stt1g sot ? 223 (pb ? free) 1000/tape & reel NCV8402stt3g sot ? 223 (pb ? free) 4000/tape & reel www..net
NCV8402 http://onsemi.com 2 maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain ? to ? source voltage internally clamped v dss 42 v drain ? to ? gate voltage internally clamped (r g = 1.0 m ) v dgr 42 v gate ? to ? source voltage v gs 14 v continuous drain current i d internally limited power dissipation @ t a = 25 c (note 1) @ t a = 25 c (note 2) @ t t = 25 c (note 1) p d 1.1 1.7 8.9 w thermal resistance junction ? to ? ambient steady state (note 1) junction ? to ? ambient steady state (note 2) junction ? to ? tab steady state (note 1) r ja r ja r jt 114 72 14 c/w single pulse drain ? to ? source avalanche energy (v dd = 32 v, v g = 5.0 v, i pk = 1.0 a, l = 300 mh, r g(ext) = 25 ) e as 150 mj load dump voltage (v gs = 0 and 10 v, r i = 2.0 , r l = 9.0 , t d = 400 ms) v ld 87 v operating junction temperature t j ? 40 to 150 c storage temperature t stg ? 55 to 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. surface ? mounted onto min pad fr4 pcb, (2 oz. cu, 0.06 thick). 2. surface ? mounted onto 2 sq. fr4 board (1 sq., 1 oz. cu, 0.06 thick). drain source gate vds vgs i d i g + ? + ? figure 1. voltage and current convention
NCV8402 http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise noted) parameter test condition symbol min typ max unit off characteristics drain ? to ? source breakdown voltage (note 3) v gs = 0 v, i d = 10 ma, t j = 25 c v (br)dss 42 46 55 v v gs = 0 v, i d = 10 ma, t j = 150 c (note 5) 40 45 55 zero gate voltage drain current v gs = 0 v, v ds = 32 v, t j = 25 c i dss 0.25 4.0 a v gs = 0 v, v ds = 32 v, t j = 150 c (note 5) 1.1 20 gate input current v ds = 0 v, v gs = 5.0 v i gssf 50 100 a on characteristics (note 3) gate threshold voltage v gs = v ds , i d = 150 a v gs(th) 1.3 1.8 2.2 v gate threshold temperature coefficient v gs(th) /t j 4.0 ? mv/ c static drain ? to ? source on ? resistance v gs = 10 v, i d = 1.7 a, t j = 25 c r ds(on) 165 200 m v gs = 10 v, i d = 1.7 a, t j = 150 c (note 5) 305 400 v gs = 5.0 v, i d = 1.7 a, t j = 25 c 195 230 v gs = 5.0 v, i d = 1.7 a, t j = 150 c (note 5) 360 460 v gs = 5.0 v, i d = 0.5 a, t j = 25 c 190 230 v gs = 5.0 v, i d = 0.5 a, t j = 150 c (note 5) 350 460 source ? drain forward on voltage v gs = 0 v, i s = 7.0 a v sd 1.0 v switching characteristics (note 5) turn ? on time (10% v in to 90% i d ) v gs = 10 v, v dd = 12 v i d = 2.5 a, r l = 4.7 t on 25 s turn ? off time (90% v in to 10% i d ) t off 120 slew ? rate on (70% v ds to 50% v ds ) v gs = 10 v, v dd = 12 v, r l = 4.7 ? dv ds /dt on 0.8 v s slew ? rate off (50% v ds to 70% v ds ) dv ds /dt off 0.3 self protection characteristics (t j = 25 c unless otherwise noted) (note 4) current limit v ds = 10 v, v gs = 5.0 v, t j = 25 c i lim 3.7 4.3 5.0 a v ds = 10 v, v gs = 5.0 v, t j = 150 c (note 5) 2.3 3.0 3.7 v ds = 10 v, v gs = 10 v, t j = 25 c 4.2 4.8 5.4 v ds = 10 v, v gs = 10 v, t j = 150 c (note 5) 2.7 3.6 4.5 temperature limit (turn ? off) v gs = 5.0 v (note 5) t lim(off) 150 175 200 c thermal hysteresis v gs = 5.0 v t lim(on) 15 temperature limit (turn ? off) v gs = 10 v (note 5) t lim(off) 150 165 185 thermal hysteresis v gs = 10 v t lim(on) 15 gate input characteristics (note 5) device on gate input current v gs = 5 v i d = 1.0 a i gon 50 a v gs = 10 v i d = 1.0 a 400 current limit gate input current v gs = 5 v, v ds = 10 v i gcl 0.05 ma v gs = 10 v, v ds = 10 v 0.4 thermal limit fault gate input current v gs = 5 v, v ds = 10 v i gtl 0.15 ma v gs = 10 v, v ds = 10 v 0.7 esd electrical characteristics (t j = 25 c unless otherwise noted) (note 5) electro ? static discharge capability human body model (hbm) esd 4000 v machine model (mm) 400 3. pulse test: pulse width 300 s, duty cycle 2%. 4. fault conditions are viewed as beyond the normal operating range of the part. 5. not subject to production testing.
NCV8402 http://onsemi.com 4 typical performance curves 1 10 10 100 figure 2. single pulse maximum switch ? off current vs. load inductance l (mh) i l(max) (a) t jstart = 25 c t jstart = 150 c 10 100 1000 10 10 0 figure 3. single pulse maximum switching energy vs. load inductance l (mh) e max (mj) t jstart = 25 c t jstart = 150 c 0.1 1 10 110 figure 4. single pulse maximum inductive switch ? off current vs. time in clamp time in clamp (ms) i l(max) (a) t jstart = 25 c t jstart = 150 c 10 100 1000 110 figure 5. single pulse maximum inductive switching energy vs. time in clamp time in clamp (ms) e max (mj) t jstart = 25 c t jstart = 150 c figure 6. on ? state output characteristics 0 1 2 3 4 5 12345 v ds = 10 v 25 c 100 c 150 c ? 40 c i d (a) v gs (v) figure 7. transfer characteristics v ds (v) i d (a) v gs = 2.5 v 3 v 4 v 5 v 6 v 8 v 10 v t a = 25 c 0 1 2 3 4 5 6 7 8 012345 3.5 v
NCV8402 http://onsemi.com 5 typical performance curves 0 100 200 300 400 45678910 figure 8. r ds(on) vs. gate ? source voltage v gs (v) r ds(on) (m ) 150 c, i d = 0.5 a 150 c, i d = 1.7 a 100 c, i d = 0.5 a 100 c, i d = 1.7 a 25 c, i d = 0.5 a 25 c, i d = 1.7 a ? 40 c, i d = 0.5 a ? 40 c, i d = 1.7 a 50 100 150 200 250 300 350 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 150 c, v gs = 10 v 150 c, v gs = 5 v 100 c, v gs = 5 v 100 c, v gs = 10 v 25 c, v gs = 5 v 25 c, v gs = 10 v ? 40 c, v gs = 5 v ? 40 c, v gs = 10 v figure 9. r ds(on) vs. drain current i d (a) r ds(on) (m ) 0.5 0.75 1 1.25 1.5 1.75 2 ? 40 ? 20 0 20 40 60 80 100 120 140 v gs = 5 v v gs = 10 v i d = 1.7 a figure 10. normalized r ds(on) vs. temperature t ( c) r ds(on) (normialzized) 2 3 4 5 6 7 8 5678910 25 c 100 c 150 c ? 40 c figure 11. current limit vs. gate ? source voltage v gs (v) i lim (a) v ds = 10 v 2 3 4 5 6 7 8 ? 40 ? 20 0 20 40 60 80 100 120 140 figure 12. current limit vs. junction temperature t j ( c) i lim (a) v ds = 10 v v gs = 5 v v gs = 10 v 0.0001 0.001 0.01 0.1 1 10 10 15 20 25 30 35 40 figure 13. drain ? to ? source leakage current v ds (v) i dss ( a) v gs = 0 v 25 c 100 c 150 c ? 40 c
NCV8402 http://onsemi.com 6 typical performance curves 0.6 0.7 0.8 0.9 1 1.1 1.2 ? 40 ? 20 0 20 40 60 80 100 120 140 figure 14. normalized threshold voltage vs. temperature t ( c) normalized v gs(th) (v) i d = 150 a v gs = v ds 0.5 0.6 0.7 0.8 0.9 1 1.1 12345678910 figure 15. source ? drain diode forward characteristics i s (a) v sd (v) 25 c 100 c 150 c ? 40 c v gs = 0 v 0 50 100 150 200 345678910 t d(off) t d(on) t f t r figure 16. resistive load switching time vs. gate ? source voltage v gs (v) time ( s) i d = 2.5 a v dd = 12 v r g = 0 0 0.2 0.4 0.6 0.8 1 345678910 figure 17. resistive load switching drain ? source voltage slope vs. gate ? source voltage v gs (v) drain ? source voltage slope (v/ s) i d = 2.5 a v dd = 12 v r g = 0 ? dv ds /d t(on) dv ds /d t(off) 0 25 50 75 100 0 400 800 1200 1600 2000 time ( s) figure 18. resistive load switching time vs. gate resistance r g ( ) t f , (v gs = 10 v) t f , (v gs = 5 v) t d(off) , (v gs = 10 v) t r , (v gs = 5 v) t d(off) , (v gs = 5 v) t r , (v gs = 10 v) t d(on) , (v gs = 5 v) t d(on) , (v gs = 10 v) i d = 2.5 a v dd = 12 v 0 0.2 0.4 0.6 0.8 1 0 500 1000 1500 2000 dv ds /d t(off) , v gs = 5 v ? dv ds /d t(on) , v gs = 10 v ? dv ds /d t(on) , v gs = 5 v dv ds /d t(off) , v gs = 10 v figure 19. drain ? source voltage slope during turn on and turn off vs. gate resistance r g ( ) drain ? source voltage slope (v/ s) i d = 2.5 a v dd = 12 v
NCV8402 http://onsemi.com 7 typical performance curves 0.01 0.1 1 10 100 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 single pulse 50% duty cycle 20% 10% 5% 2% 1% pulse width (sec) r ja 788 mm 2 c /w figure 20. transient thermal resistance
NCV8402 http://onsemi.com 8 test circuits and waveforms dut g d s rl vdd ids vin figure 21. resistive load switching test circuit rg + ? td(on) tr vin ids td(off) tf 10% 10% 90% 90% figure 22. resistive load switching waveforms
NCV8402 http://onsemi.com 9 test circuits and waveforms vdd ids vin l vds tp figure 23. inductive load switching test circuit dut g d s rg + ? 0 v 5 v t av vin ids vds t p v ds(on) i pk 0 vdd v (br)dss figure 24. inductive load switching waveforms
NCV8402 http://onsemi.com 10 package dimensions sot ? 223 (to ? 261) case 318e ? 04 issue m style 3: pin 1. gate 2. drain 3. source 4. drain a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint* h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. NCV8402/d hdplus is a trademark of semiconductor components industries, llc (scillc). publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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